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SKU/Artículo: AMZ-3639175395

Iterative Decoding in Analog VLSI: Dynamics and Circuits

Format:

Paperback

Detalles del producto

Disponibilidad:
En stock

Peso con empaque:
0.56 kg

Devolución:
Sí

Condición
Nuevo

Producto de:
Amazon

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USA

Sobre este producto

This book explores theoretical and practical aspects of iterative decoding algorithms when they are implemented on analog continuous-time platforms. Analog continuous-time iterative decoding was proposed a few years ago to improve the power/speed ratio of decoder chips that decode capacity achieving codes. It was commonly believed that replacing discrete-time processing modules with analog circuits would not change the dynamics of the iterative decoder. On the contrary, it is shown that not only does continuous-time iterative decoding have different dynamics, but also its error correcting performance can surpass that of conventional iterative decoders. Furthermore, novel processing modules for implementing affordable high-speed strongly inverted CMOS analog min-sum iterative decoders are presented. This is favorable because previously reported analog decoders were either BiCMOS or weakly inverted CMOS designs. The former could be fast but is rather expensive and the latter would be low-power but it is not fast enough for many applications.

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